26#define __AVR_ATmega32U4__ 1
36#ifdef __INTELLISENSE__
37#define ISR(vector) void vector(void)
39#include <avr/interrupt.h>
44#ifdef __INTELLISENSE__
47#include <avr/pgmspace.h>
99#define F_MOSFET_MAX 100000UL
115#define F_MOSFET_MIN 7183UL
157#define F_MOSFET 20000UL
158#if (F_MOSFET > F_MOSFET_MAX)
159#error "ADVISORY WARNING: F_MOSFET should not be set above F_MOSFET_MAX."
161#if (F_MOSFET < F_MOSFET_MIN)
162#error "ADVISORY WARNING: F_MOSFET should not be set below F_MOSFET_MIN."
186#define DEAD_TIME 350UL
188#error "ADVISORY WARNING: DEAD_TIME should not be set below 350 ns. If you want to still continue, please uncomment and compile again."
201#define HALL_PULLUP_ENABLE TRUE
220#define EMULATE_HALL FALSE
236#define TIM3_FREQ 200UL
246#define COMMUTATION_TICKS_STOPPED 6000
259#define TURN_OFF_MODE TURN_OFF_MODE_RAMP
276#define IPHASE_GAIN 20
294#define IPHASE_SENSE_RESISTOR 2500
332#define IBUS_SENSE_RESISTOR 4000
367#define IBUS_WARNING_THRESHOLD 307
406#define IBUS_ERROR_THRESHOLD 410
419#define IBUS_FAULT_ENABLE TRUE
433#define SPEED_CONTROL_METHOD SPEED_CONTROL_OPEN_LOOP
448#define SPEED_CONTROLLER_TIME_BASE 200
469#define SPEED_CONTROLLER_MAX_DELTA 1
490#define SPEED_CONTROLLER_MAX_SPEED 400
547#define PID_K_D_ENABLE TRUE
586#define VBUS_RTOP 100000
606#define VBUS_RBOTTOM 6200
633#define WAIT_FOR_BOARD TRUE
634#if (WAIT_FOR_BOARD == FALSE) && (IBUS_FAULT_ENABLE == TRUE)
635#warning "CONFIG WARNING: IBUS_FAULT_ENABLE is TRUE while WAIT_FOR_BOARD is FALSE - IBUS ADC may float when inverter not connected, causing false OC faults"
644#define REMOTE_DEBUG_MODE FALSE
664#define F_HST 64000000UL
682#define PWM_PATTERN_PORTB ((1 << AH_PIN) | (1 << AL_PIN))
684#define PWM_PATTERN_PORTC ((1 << BH_PIN) | (1 << BL_PIN))
686#define PWM_PATTERN_PORTD ((1 << CH_PIN) | (1 << CL_PIN))
689#define OC_ENABLE_PORTB ((1 << OC4OE3) | (1 << OC4OE2))
692#define OC_ENABLE_PORTC ((1 << OC4OE1) | (1 << OC4OE0))
695#define OC_ENABLE_PORTD ((1 << OC4OE5) | (1 << OC4OE4))
699#define DIRECTION_FORWARD 0
701#define DIRECTION_REVERSE 1
703#define DIRECTION_UNKNOWN 3
718#define ADC_MUX_L_SPEED ADC_MUX_L_ADC4
721#define ADC_MUX_H_SPEED ADC_MUX_H_ADC4
723#define ADC_MUX_L_IBUS ADC_MUX_L_ADC5
725#define ADC_MUX_H_IBUS ADC_MUX_H_ADC5
727#define ADC_MUX_L_IPHASE_U ADC_MUX_L_ADC1
729#define ADC_MUX_H_IPHASE_U ADC_MUX_H_ADC1
731#define ADC_MUX_L_IPHASE_V ADC_MUX_L_ADC7
733#define ADC_MUX_H_IPHASE_V ADC_MUX_H_ADC7
735#define ADC_MUX_L_IPHASE_W ADC_MUX_L_ADC0
737#define ADC_MUX_H_IPHASE_W ADC_MUX_H_ADC0
739#define ADC_MUX_L_VBUSVREF ADC_MUX_L_ADC6
741#define ADC_MUX_H_VBUSVREF ADC_MUX_H_ADC6
745#define ADC_PRESCALER ADC_PRESCALER_DIV_128
747#define ADC_REFERENCE_VOLTAGE ADC_REFERENCE_VOLTAGE_VCC
749#define ADC_TRIGGER ADC_TRIGGER_TIMER0_OVF
753#define DIRECTION_COMMAND_PIN PD2
755#define ENABLE_PIN PD0
757#define REMOTE_PIN PD3
763#define SPEED_INPUT_SOURCE_LOCAL 0
765#define SPEED_INPUT_SOURCE_REMOTE 1
769#define FAULT_PIN_1 PD4
771#define FAULT_PIN_2 PB4
773#define FAULT_PIN_3 PB7
777#define WAVEFORM_BLOCK_COMMUTATION 0
779#define WAVEFORM_UNDEFINED 3
783#define TURN_OFF_MODE_COAST 0
785#define TURN_OFF_MODE_RAMP 1
789#define SPEED_CONTROL_OPEN_LOOP 0
791#define SPEED_CONTROL_CLOSED_LOOP 1
805#define SPEED_CONTROLLER_MAX_INPUT 255
808#define CHOOSE_TIM4_PRESCALER(tim4Freq) ((tim4Freq) < 15625 ? 4 : ((tim4Freq) < 31250 ? 2 : 1))
826#define CHOOSE_DT_PRESCALER(deadTime) \
827 ((deadTime) <= 234 ? 1 : (deadTime) <= 468 ? 2 \
828 : (deadTime) <= 937 ? 4 \
829 : (deadTime) <= 1875 ? 8 \
843#if defined(__INTELLISENSE__) || defined(__DOXYGEN__)
844#define FORCE_INLINE inline
846#define FORCE_INLINE inline __attribute__((always_inline))
859#if defined(__INTELLISENSE__) || defined(__DOXYGEN__)
860#define FAST_ACCESS(register_address)
862#define FAST_ACCESS(register_address) __attribute__((address(register_address)))
865#ifdef __INTELLISENSE__
875#define sei() ((void)0)
886#define cli() ((void)0)
897#define PLL_POSTSCALER_OFF ((0 << PLLTM1) | (0 << PLLTM0))
899#define PLL_POSTSCALER_DIV_1_0 ((0 << PLLTM1) | (1 << PLLTM0))
901#define PLL_POSTSCALER_DIV_1_5 ((1 << PLLTM1) | (0 << PLLTM0))
903#define PLL_POSTSCALER_DIV_2_0 ((1 << PLLTM1) | (1 << PLLTM0))
913#define DT_PRESCALER_DIV_1 ((0 << DTPS41) | (0 << DTPS40))
915#define DT_PRESCALER_DIV_2 ((0 << DTPS41) | (1 << DTPS40))
917#define DT_PRESCALER_DIV_4 ((1 << DTPS41) | (0 << DTPS40))
919#define DT_PRESCALER_DIV_8 ((1 << DTPS41) | (1 << DTPS40))
930#define TIM1_CLOCK_OFF ((0 << CS12) | (0 << CS11) | (0 << CS10))
932#define TIM1_CLOCK_DIV_1 ((0 << CS12) | (0 << CS11) | (1 << CS10))
934#define TIM1_CLOCK_DIV_8 ((0 << CS12) | (1 << CS11) | (0 << CS10))
936#define TIM1_CLOCK_DIV_64 ((0 << CS12) | (1 << CS11) | (1 << CS10))
938#define TIM1_CLOCK_DIV_256 ((1 << CS12) | (0 << CS11) | (0 << CS10))
940#define TIM1_CLOCK_DIV_1024 ((1 << CS12) | (0 << CS11) | (1 << CS10))
942#define TIM1_CLOCK_EXT_FALLING ((1 << CS12) | (1 << CS11) | (0 << CS10))
944#define TIM1_CLOCK_EXT_RISING ((1 << CS12) | (1 << CS11) | (1 << CS10))
954#define TIM4_PRESCALER_OFF ((0 << CS43) | (0 << CS42) | (0 << CS41) | (0 << CS40))
956#define TIM4_PRESCALER_DIV_1 ((0 << CS43) | (0 << CS42) | (0 << CS41) | (1 << CS40))
958#define TIM4_PRESCALER_DIV_2 ((0 << CS43) | (0 << CS42) | (1 << CS41) | (0 << CS40))
960#define TIM4_PRESCALER_DIV_4 ((0 << CS43) | (0 << CS42) | (1 << CS41) | (1 << CS40))
971#define ADC_MUX_L_BITS ((1 << MUX4) | (1 << MUX3) | (1 << MUX2) | (1 << MUX1) | (1 << MUX0))
973#define ADC_MUX_H_BITS (1 << MUX5)
975#define ADC_MUX_L_ADC0 ((0 << MUX4) | (0 << MUX3) | (0 << MUX2) | (0 << MUX1) | (0 << MUX0))
977#define ADC_MUX_H_ADC0 (0 << MUX5)
979#define ADC_MUX_L_ADC1 ((0 << MUX4) | (0 << MUX3) | (0 << MUX2) | (0 << MUX1) | (1 << MUX0))
981#define ADC_MUX_H_ADC1 (0 << MUX5)
983#define ADC_MUX_L_ADC4 ((0 << MUX4) | (0 << MUX3) | (1 << MUX2) | (0 << MUX1) | (0 << MUX0))
985#define ADC_MUX_H_ADC4 (0 << MUX5)
987#define ADC_MUX_L_ADC5 ((0 << MUX4) | (0 << MUX3) | (1 << MUX2) | (0 << MUX1) | (1 << MUX0))
989#define ADC_MUX_H_ADC5 (0 << MUX5)
991#define ADC_MUX_L_ADC6 ((0 << MUX4) | (0 << MUX3) | (1 << MUX2) | (1 << MUX1) | (0 << MUX0))
993#define ADC_MUX_H_ADC6 (0 << MUX5)
995#define ADC_MUX_L_ADC7 ((0 << MUX4) | (0 << MUX3) | (1 << MUX2) | (1 << MUX1) | (1 << MUX0))
997#define ADC_MUX_H_ADC7 (0 << MUX5)
999#define ADC_MUX_L_ADC8 ((0 << MUX4) | (0 << MUX3) | (0 << MUX2) | (0 << MUX1) | (0 << MUX0))
1001#define ADC_MUX_H_ADC8 (1 << MUX5)
1003#define ADC_MUX_L_ADC9 ((0 << MUX4) | (0 << MUX3) | (0 << MUX2) | (0 << MUX1) | (1 << MUX0))
1005#define ADC_MUX_H_ADC9 (1 << MUX5)
1007#define ADC_MUX_L_ADC10 ((0 << MUX4) | (0 << MUX3) | (0 << MUX2) | (1 << MUX1) | (0 << MUX0))
1009#define ADC_MUX_H_ADC10 (1 << MUX5)
1011#define ADC_MUX_L_ADC11 ((0 << MUX4) | (0 << MUX3) | (0 << MUX2) | (1 << MUX1) | (1 << MUX0))
1013#define ADC_MUX_H_ADC11 (1 << MUX5)
1015#define ADC_MUX_L_ADC12 ((0 << MUX4) | (0 << MUX3) | (1 << MUX2) | (0 << MUX1) | (0 << MUX0))
1017#define ADC_MUX_H_ADC12 (1 << MUX5)
1019#define ADC_MUX_L_ADC13 ((0 << MUX4) | (0 << MUX3) | (1 << MUX2) | (0 << MUX1) | (1 << MUX0))
1021#define ADC_MUX_H_ADC13 (1 << MUX5)
1023#define ADC_MUX_L_TEMP_SENSOR ((0 << MUX4) | (0 << MUX3) | (1 << MUX2) | (1 << MUX1) | (1 << MUX0))
1025#define ADC_MUX_H_TEMP_SENSOR (1 << MUX5)
1027#define ADC_MUX_L_1V1 ((1 << MUX4) | (1 << MUX3) | (1 << MUX2) | (1 << MUX1) | (0 << MUX0))
1029#define ADC_MUX_H_1V1 (0 << MUX5)
1031#define ADC_MUX_L_0V ((1 << MUX4) | (1 << MUX3) | (1 << MUX2) | (1 << MUX1) | (1 << MUX0))
1033#define ADC_MUX_H_0V (0 << MUX5)
1043#define ADC_PRESCALER_DIV_2 ((0 << ADPS2) | (0 << ADPS1) | (0 << ADPS0))
1045#define ADC_PRESCALER_DIV_4 ((0 << ADPS2) | (1 << ADPS1) | (0 << ADPS0))
1047#define ADC_PRESCALER_DIV_8 ((0 << ADPS2) | (1 << ADPS1) | (1 << ADPS0))
1049#define ADC_PRESCALER_DIV_16 ((1 << ADPS2) | (0 << ADPS1) | (0 << ADPS0))
1051#define ADC_PRESCALER_DIV_32 ((1 << ADPS2) | (0 << ADPS1) | (1 << ADPS0))
1053#define ADC_PRESCALER_DIV_64 ((1 << ADPS2) | (1 << ADPS1) | (0 << ADPS0))
1055#define ADC_PRESCALER_DIV_128 ((1 << ADPS2) | (1 << ADPS1) | (1 << ADPS0))
1065#define ADC_REFERENCE_VOLTAGE_AREF ((0 << REFS1) | (0 << REFS0))
1067#define ADC_REFERENCE_VOLTAGE_VCC ((0 << REFS1) | (1 << REFS0))
1069#define ADC_REFERENCE_VOLTAGE_INTERNAL ((1 << REFS1) | (1 << REFS0))
1079#define ADC_TRIGGER_FREE ((0 << ADTS3) | (0 << ADTS2) | (0 << ADTS1) | (0 << ADTS0))
1081#define ADC_TRIGGER_ANALOG_COMP ((0 << ADTS3) | (0 << ADTS2) | (0 << ADTS1) | (1 << ADTS0))
1083#define ADC_TRIGGER_INT0 ((0 << ADTS3) | (0 << ADTS2) | (1 << ADTS1) | (0 << ADTS0))
1085#define ADC_TRIGGER_TIMER0_COMPA ((0 << ADTS3) | (0 << ADTS2) | (1 << ADTS1) | (1 << ADTS0))
1087#define ADC_TRIGGER_TIMER0_OVF ((0 << ADTS3) | (1 << ADTS2) | (0 << ADTS1) | (0 << ADTS0))
1089#define ADC_TRIGGER_TIMER1_COMPB ((0 << ADTS3) | (1 << ADTS2) | (0 << ADTS1) | (1 << ADTS0))
1091#define ADC_TRIGGER_TIMER1_OVF ((0 << ADTS3) | (1 << ADTS2) | (1 << ADTS1) | (0 << ADTS0))
1093#define ADC_TRIGGER_TIMER1_CAPT ((0 << ADTS3) | (1 << ADTS2) | (1 << ADTS1) | (1 << ADTS0))
1095#define ADC_TRIGGER_TIMER4_OVF ((1 << ADTS3) | (0 << ADTS2) | (0 << ADTS1) | (0 << ADTS0))
1097#define ADC_TRIGGER_TIMER4_COMPA ((1 << ADTS3) | (0 << ADTS2) | (0 << ADTS1) | (1 << ADTS0))
1099#define ADC_TRIGGER_TIMER4_COMPB ((1 << ADTS3) | (0 << ADTS2) | (1 << ADTS1) | (0 << ADTS0))
1101#define ADC_TRIGGER_TIMER4_COMPD ((1 << ADTS3) | (0 << ADTS2) | (1 << ADTS1) | (1 << ADTS0))
1209#define TIM4_PRESCALER_DIV_PATTERN(tim4Prescaler) \
1210 ((tim4Prescaler) == 1 ? TIM4_PRESCALER_DIV_1 : (tim4Prescaler) == 2 ? TIM4_PRESCALER_DIV_2 \
1211 : (tim4Prescaler) == 4 ? TIM4_PRESCALER_DIV_4 \
1216#define TIM4_TOP(tim4Freq) (((F_HST / ((uint32_t)tim4Freq * CHOOSE_TIM4_PRESCALER(tim4Freq))) >> 1) - 1)
1219#define TIM4_TOP_MAX 0x03ff
1227#define DT_PRESCALER_DIV_PATTERN(dtPrescaler) \
1228 ((dtPrescaler) == 1 ? DT_PRESCALER_DIV_1 : (dtPrescaler) == 2 ? DT_PRESCALER_DIV_2 \
1229 : (dtPrescaler) == 4 ? DT_PRESCALER_DIV_4 \
1230 : (dtPrescaler) == 8 ? DT_PRESCALER_DIV_8 \
1237#define DEAD_TIME_HALF(deadTime) (((uint8_t)(ceil((double)deadTime * F_HST / ((double)CHOOSE_DT_PRESCALER(deadTime) * 1000000000)))))
1245#define TIM3_TOP (((F_CPU / TIM3_FREQ / 3) >> 4) - 1)
1248#define TIM3_TOP_MAX 0xffff
1249#if TIM3_TOP_ > TIM3_TOP_MAX
1250#error "Invalid TIM3_FREQ set"
1253#if ((EMULATE_HALL == TRUE) && (SPEED_CONTROL_METHOD == SPEED_CONTROL_CLOSED_LOOP))
1254#error "Invalid combination of EMULATE_HALL and SPEED_CONTROL_METHOD"
struct motorflags motorflags_t
Collection of all motor control flags.
fault_flag_t
Enumeration of fault flags.
struct motorconfigs motorconfigs_t
Collection of motor configurations.
struct faultflags faultflags_t
Collection of all fault flags.
@ FAULT_OVER_CURRENT
Has it tripped the over current limit?
@ FAULT_USER_FLAG1
Is user flag 1 set?
@ FAULT_NO_HALL_CONNECTIONS
Is there no hall connections?
@ FAULT_USER_FLAG2
Is user flag 2 set?
@ FAULT_RESERVED
Reserved flag, always false.
@ FAULT_USER_FLAG3
Is user flag 3 set?
@ FAULT_REVERSE_DIRECTION
Is motor spinning in an unexpected direction?
@ FAULT_MOTOR_STOPPED
Is motor stopped?
Collection of all fault flags.
uint8_t userFlag2
Is user flag 2 set?
uint8_t motorStopped
Is motor stopped?
uint8_t userFlag3
Is user flag 3 set?
uint8_t reserved
Reserved bit(s).
uint8_t noHallConnections
Is there no hall connections?
uint8_t overCurrent
Has it tripped the over current limit?
uint8_t reverseDirection
Is motor spinning in an unexpected direction?
uint8_t userFlag1
Is user flag 1 set?
Collection of motor configurations.
uint16_t tim4Top
Corresponding TIM4 top value for TIM4 frequency.
uint8_t speedInputSource
SpeedInput source select (only for remote mode).
uint16_t tim4DeadTime
Corresponding dead time for TIM4 output.
uint32_t tim4Freq
TIM4 or gate switching frequency.
Collection of all motor control flags.
uint8_t desiredDirection
The desired direction of rotation.
uint8_t enable
Is the motor enabled?
uint8_t actualDirection
The actual direction of rotation.
uint8_t driveWaveform
The current waveform that should be produced.
uint8_t fatalFault
Fatal fault.
uint8_t reserved
Reserved bit(s).
uint8_t remote
Is the remote enabled?
uint8_t speedControllerRun
Should speed controller run?