Motor Evaluation Kit NEVC-MCTRL-100-t01-1.0.0
Firmware for NEVB-MCTRL-100-01 for trapezoidal control of BLDC motors using Hall-effect sensors
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tables.h File Reference

Motor Control Tables. More...

#include <Arduino.h>
#include <stdint.h>
#include <avr/pgmspace.h>
#include "main.h"
Include dependency graph for tables.h:
This graph shows which files directly or indirectly include this file:

Go to the source code of this file.

Macros

#define __AVR_ATmega32U4__   1
 Define macro for ATmega32U4 micro controller.
 

Variables

const uint8_t blockCommutationTableForward [32]
 Block Commutation Port Direction Masks for Forward Driving.
 
const uint8_t blockCommutationTableReverse [32]
 Block Commutation Port Direction Masks for Reverse Driving.
 
const uint8_t expectedHallSequenceForward [7]
 Table of Expected Hall Sensor Values in Forward Direction.
 
const uint8_t expectedHallSequenceReverse [7]
 Table of Expected Hall Sensor Values in Reverse Direction.
 

Detailed Description

Motor Control Tables.

This file contains table definitions used for motor control, including block commutation masks, expected hall sensor sequences, and related settings.

Author
Nexperia: http://www.nexperia.com
Support Page
For additional support, visit: https://www.nexperia.com/support
Author
Aanas Sayed
Date
2024/03/08


Definition in file tables.h.

Macro Definition Documentation

◆ __AVR_ATmega32U4__

#define __AVR_ATmega32U4__   1

Define macro for ATmega32U4 micro controller.

Definition at line 26 of file tables.h.

Variable Documentation

◆ blockCommutationTableForward

const uint8_t blockCommutationTableForward[32]
Initial value:
=
{
0, 0, 0, 0,
(1 << PB5 ), (0 << PC6 ), (0 << PD6 ), ((1 << OC4OE5) | (1 << OC4OE4)) ,
(0 << PB5 ), (1 << PC6 ), (0 << PD6 ), ((1 << OC4OE3) | (1 << OC4OE2)) ,
(0 << PB5 ), (1 << PC6 ), (0 << PD6 ), ((1 << OC4OE5) | (1 << OC4OE4)) ,
(0 << PB5 ), (0 << PC6 ), (1 << PD6 ), ((1 << OC4OE1) | (1 << OC4OE0)) ,
(1 << PB5 ), (0 << PC6 ), (0 << PD6 ), ((1 << OC4OE1) | (1 << OC4OE0)) ,
(0 << PB5 ), (0 << PC6 ), (1 << PD6 ), ((1 << OC4OE3) | (1 << OC4OE2)) ,
0, 0, 0, 0}

Block Commutation Port Direction Masks for Forward Driving.

This array contains port and output compare override masks for block commutation when running in the forward direction. It defines how the timer controls the output compare (OC) pins and the output state of corresponding pins for each commutation step.

The masks control the following:

  • The TCCR4E register (OC_ENABLE_PORTB, OC_ENABLE_PORTC, OC_ENABLE_PORTD): This controls the output compare (OC) pins by enabling or disabling them for each commutation step. A '1' enables the corresponding OC pin for PWM output, while '0' disables it for normal port operation.
  • The PORTx registers (PORTB, PORTC, PORTD): These control the output state of the corresponding pins (AL_PIN, BL_PIN, CL_PIN) for each commutation step. A '1' in the mask represents a pin set to a HIGH state, while '0' represents a pin set to a LOW state.
Table:
Hall Phase A/PORTB Phase B/PORTC Phase C/PORTD TCCR4E
000 0 0 0 0
001 1 0 0 OC_ENABLE_PORTD
010 0 1 0 OC_ENABLE_PORTB
011 0 0 1 OC_ENABLE_PORTC
100 1 0 0 OC_ENABLE_PORTC
101 0 0 1 OC_ENABLE_PORTB
110 0 1 0 OC_ENABLE_PORTD
111 1 0 0 0
Note
The array is stored in program memory instead of SRAM (denoted by the PROGMEM attribute). This is useful for storing large data arrays in micro controllers with limited RAM capacity.

Definition at line 80 of file tables.h.

81 {
82 0, 0, 0, 0,
83 (1 << AL_PIN), (0 << BL_PIN), (0 << CL_PIN), OC_ENABLE_PORTD, // UL, WH // AL, CH // AL, CH
84 (0 << AL_PIN), (1 << BL_PIN), (0 << CL_PIN), OC_ENABLE_PORTB, // UH, VL // AH, BL // CL, BH
85 (0 << AL_PIN), (1 << BL_PIN), (0 << CL_PIN), OC_ENABLE_PORTD, // VL, WH // BL, CH // AL, BH
86 (0 << AL_PIN), (0 << BL_PIN), (1 << CL_PIN), OC_ENABLE_PORTC, // VH, WL // BH, CL // BL, AH
87 (1 << AL_PIN), (0 << BL_PIN), (0 << CL_PIN), OC_ENABLE_PORTC, // UL, VH // AL, BH // BL, CH
88 (0 << AL_PIN), (0 << BL_PIN), (1 << CL_PIN), OC_ENABLE_PORTB, // UH, WL // AH, CL // CL, AH
89 0, 0, 0, 0};
#define CL_PIN
PIN where low side gate PWM for phase C is connected.
Definition main.h:554
#define AL_PIN
PIN where low side gate PWM for phase A is connected.
Definition main.h:550
#define BL_PIN
PIN where low side gate PWM for phase B is connected.
Definition main.h:552
#define OC_ENABLE_PORTB
Definition main.h:565
#define OC_ENABLE_PORTC
Definition main.h:568
#define OC_ENABLE_PORTD
Definition main.h:571

◆ blockCommutationTableReverse

const uint8_t blockCommutationTableReverse[32]
Initial value:
=
{
0, 0, 0, 0,
(0 << PB5 ), (0 << PC6 ), (1 << PD6 ), ((1 << OC4OE3) | (1 << OC4OE2)) ,
(1 << PB5 ), (0 << PC6 ), (0 << PD6 ), ((1 << OC4OE1) | (1 << OC4OE0)) ,
(0 << PB5 ), (0 << PC6 ), (1 << PD6 ), ((1 << OC4OE1) | (1 << OC4OE0)) ,
(0 << PB5 ), (1 << PC6 ), (0 << PD6 ), ((1 << OC4OE5) | (1 << OC4OE4)) ,
(0 << PB5 ), (1 << PC6 ), (0 << PD6 ), ((1 << OC4OE3) | (1 << OC4OE2)) ,
(1 << PB5 ), (0 << PC6 ), (0 << PD6 ), ((1 << OC4OE5) | (1 << OC4OE4)) ,
0, 0, 0, 0}

Block Commutation Port Direction Masks for Reverse Driving.

This array contains port and output compare override masks for block commutation when running in the reverse direction. It defines how the timer controls the output compare (OC) pins and the output state of corresponding pins for each commutation step.

The masks control the following:

  • The TCCR4E register (OC_ENABLE_PORTB, OC_ENABLE_PORTC, OC_ENABLE_PORTD): This controls the output compare (OC) pins by enabling or disabling them for each commutation step. A '1' enables the corresponding OC pin for PWM output, while '0' disables it for normal port operation.
  • The PORTx registers (PORTB, PORTC, PORTD): These control the output state of the corresponding pins (AL_PIN, BL_PIN, CL_PIN) for each commutation step. A '1' in the mask represents a pin set to a HIGH state, while '0' represents a pin set to a LOW state.
Table:
Hall Phase A/PORTB Phase B/PORTC Phase C/PORTD TCCR4E
000 0 0 0 0
001 1 0 0 OC_ENABLE_PORTD
010 0 1 0 OC_ENABLE_PORTB
011 0 0 1 OC_ENABLE_PORTC
100 1 0 0 OC_ENABLE_PORTC
101 0 0 1 OC_ENABLE_PORTB
110 0 1 0 OC_ENABLE_PORTD
111 1 0 0 0
Note
The array is stored in program memory (PROGMEM) instead of SRAM. This is useful for storing large data arrays in micro controllers with limited RAM capacity.

Definition at line 128 of file tables.h.

129 {
130 0, 0, 0, 0,
131 (0 << AL_PIN), (0 << BL_PIN), (1 << CL_PIN), OC_ENABLE_PORTB, // UH, WL // AH, CL // CL, AH
132 (1 << AL_PIN), (0 << BL_PIN), (0 << CL_PIN), OC_ENABLE_PORTC, // UL, VH // AL, BH // BL, CH
133 (0 << AL_PIN), (0 << BL_PIN), (1 << CL_PIN), OC_ENABLE_PORTC, // VH, WL // BH, CL // BL, AH
134 (0 << AL_PIN), (1 << BL_PIN), (0 << CL_PIN), OC_ENABLE_PORTD, // VL, WH // BL, CH // AL, BH
135 (0 << AL_PIN), (1 << BL_PIN), (0 << CL_PIN), OC_ENABLE_PORTB, // UH, VL // AH, BL // CL, BH
136 (1 << AL_PIN), (0 << BL_PIN), (0 << CL_PIN), OC_ENABLE_PORTD, // UL, WH // AL, CH // AL, CH
137 0, 0, 0, 0};

◆ expectedHallSequenceForward

const uint8_t expectedHallSequenceForward[7]
Initial value:
=
{
0xff, 3, 6, 2, 5, 1, 4}

Table of Expected Hall Sensor Values in Forward Direction.

This array represents the expected next hall sensor value when the motor is running in the forward direction. Each element in the array corresponds to the next anticipated hall sensor value, indexed by the current hall sensor value.

For example, if the current hall sensor value is '2', the next expected hall sensor value in the forward direction is '6'.

Definition at line 149 of file tables.h.

150 {
151 0xff, 3, 6, 2, 5, 1, 4};

◆ expectedHallSequenceReverse

const uint8_t expectedHallSequenceReverse[7]
Initial value:
=
{
0xff, 5, 3, 1, 6, 4, 2}

Table of Expected Hall Sensor Values in Reverse Direction.

This array represents the expected next hall sensor value when the motor is running in the reverse direction. Each element in the array corresponds to the next anticipated hall sensor value, indexed by the current hall sensor value.

For example, if the current hall sensor value is '2', the next expected hall sensor value in the reverse direction is '3'.

Definition at line 163 of file tables.h.

164 {
165 0xff, 5, 3, 1, 6, 4, 2};